Note: When clicking on a Digital Object Identifier (DOI) number, you will be taken to an external site maintained by the publisher.
Some full text articles may not yet be available without a charge during the embargo (administrative interval).
What is a DOI Number?
Some links on this page may take you to non-federal websites. Their policies may differ from this site.
-
Free, publicly-accessible full text available July 1, 2026
-
Free, publicly-accessible full text available November 11, 2026
-
Free, publicly-accessible full text available February 7, 2026
-
Abstract A synaptic memristor using 2D ferroelectric junctions is a promising candidate for future neuromorphic computing with ultra‐low power consumption, parallel computing, and adaptive scalable computing technologies. However, its utilization is restricted due to the limited operational voltage memory window and low on/off current (ION/OFF) ratio of the memristor devices. Here, it is demonstrated that synaptic operations of 2D In2Se3ferroelectric junctions in a planar memristor architecture can reach a voltage memory window as high as 16 V (±8 V) and ION/OFFratio of 108, significantly higher than the current literature values. The power consumption is 10−5 W at the on state, demonstrating low power usage while maintaining a large ION/OFFratio of 108compared to other ferroelectric devices. Moreover, the developed ferroelectric junction mimicked synaptic plasticity through pulses in the pre‐synapse. The nonlinearity factors are obtained 1.25 for LTP, −0.25 for LTD, respectively. The single‐layer perceptron (SLP) and convolutional neural network (CNN) on‐chip training results in an accuracy of up to 90%, compared to the 91% in an ideal synapse device. Furthermore, the incorporation of a 3 nm thick SiO2interface between the α‐In2Se3and the Au electrode resulted in ultrahigh performance among other 2D ferroelectric junction devices to date.more » « lessFree, publicly-accessible full text available February 1, 2026
-
Analog neuromorphic computing systems emulate the parallelism and connectivity of the human brain, promising greater expressivity and energy efficiency compared to those of digital systems. Though many devices have emerged as candidates for artificial neurons and artificial synapses, there have been few device candidates for artificial dendrites. In this work, we report on biocompatible graphene-based artificial dendrites (GrADs) that can implement dendritic processing. By using a dual side-gate configuration, current applied through a Nafion membrane can be used to control device conductance across a trilayer graphene channel, showing spatiotemporal responses of leaky recurrent, alpha, and Gaussian dendritic potentials. The devices can be variably connected to enable higher-order neuronal responses, and we show through data-driven spiking neural network simulations that spiking activity is reduced by ≤15% without accuracy loss while low-frequency operation is stabilized. This positions the GrADs as strong candidates for energy efficient bio-interfaced spiking neural networks.more » « less
An official website of the United States government
